Ralf Dreesen, Michael Thies, Uwe Kastens:
Type Analysis on Bitstring Expressions. In
Proceedings of the 9th Workshop on Optimizations for DSP and Embedded Systems (ODES-9). April 2011
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Show BibTeX]
@inproceedings{rmu11,
author = {Ralf Dreesen AND Michael Thies AND Uwe Kastens},
title = {Type Analysis on Bitstring Expressions},
booktitle = {Proceedings of the 9th Workshop on Optimizations for DSP and Embedded Systems (ODES-9)},
year = {2011}
}
Ralf Dreesen, Thorsten Jungeblut, Michael Thies, Uwe Kastens:
Dependence Analysis of VLIW Code for Non-Interlocked Pipelines. In
Proceedings of the 8th Workshop on Optimizations for DSP and Embedded Systems (ODES-8). 2010
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Show BibTeX]
@inproceedings{dreesen_2010,
author = {Ralf Dreesen AND Thorsten Jungeblut AND Michael Thies AND Uwe Kastens},
title = {Dependence Analysis of VLIW Code for Non-Interlocked Pipelines},
booktitle = {Proceedings of the 8th Workshop on Optimizations for DSP and Embedded Systems (ODES-8)},
year = {2010}
}
Stephanie Drzevitzky, Uwe Kastens, Marco Platzner:
Proof-Carrying Hardware: Concepts and Prototype Tool Flow for Online Verification. In
International Journal of Reconfigurable Computing, vol. 2010, pp. 11. 2010 . Article ID 180242.
[
Show BibTeX]
@article{drzevitzky10_ijrc,
author = {Stephanie Drzevitzky AND Uwe Kastens AND Marco Platzner},
title = {{Proof-Carrying Hardware: Concepts and Prototype Tool Flow for Online Verification}},
journal = {International Journal of Reconfigurable Computing},
year = {2010},
volume = {2010},
number = {},
pages = {11},
month = {},
note = {Article ID 180242}
}
[
DOI]
Ralf Dreesen, Thorsten Jungeblut, Michael Thies, Mario Porrmann, Uwe Kastens, Ulrich Rückert:
A Synchronization Method for Register Traces of Pipelined Processors. In
Analysis, Architectures and Modelling of Embedded Systems, IFIP Advances in Information and Communication Technology, vol. 310, pp. 207-217. Springer Boston, 2009
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@inproceedings{dreesen_jungeblut_2009,
author = {Ralf Dreesen AND Thorsten Jungeblut AND Michael Thies AND Mario Porrmann AND Uwe Kastens AND Ulrich R{\"u}ckert},
title = {A Synchronization Method for Register Traces of Pipelined Processors},
booktitle = {Analysis, Architectures and Modelling of Embedded Systems},
year = {2009}
}
[
Full Text]
Stephanie Drzevitzky, Uwe Kastens, Marco Platzner:
Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. In
Proceedings of the International Conference on ReConFigurable Computing and FPGAs (Los Alamitos, CA, USA), pp. 189-194. IEEE Computer Society, December 2009
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Show BibTeX]
@inproceedings{drzevitzky2009_reconfig,
author = {Stephanie Drzevitzky AND Uwe Kastens AND Marco Platzner},
title = {Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules},
booktitle = {Proceedings of the International Conference on ReConFigurable Computing and FPGAs},
year = {2009}
}
[
DOI]
Ralf Dreesen, Michael Hußmann, Michael Thies, Uwe Kastens:
Register Allocation for Processors with Dynamically Reconfigurable Register Banks. In
Proceedings of the 5rd Workshop on Optimizations for DSP and Embedded Systems (ODES) held in conjunction with the 5rd IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2007). 2007
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@inproceedings{Dreesen_etal_mar2007,
author = {Ralf Dreesen AND Michael Hußmann AND Michael Thies AND Uwe Kastens},
title = {Register Allocation for Processors with Dynamically Reconfigurable Register Banks},
booktitle = {Proceedings of the 5rd Workshop on Optimizations for DSP and Embedded Systems (ODES) held in conjunction with the 5rd IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2007)},
year = {2007}
}
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Full Text]
Christian Sauer, M. Gries, Jörg-Christian Niemann, Mario Porrmann, Michael Thies:
Application-driven Development of Concurrent Packet Processing Platforms. In
PARELEC 2006, International Conference on Parallel Computing in Electrical Engineering, Bialystok, Poland. 2006
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@inproceedings{SGNPT2006,
author = {Christian Sauer AND M. Gries AND J{\"o}rg-Christian Niemann AND Mario Porrmann AND Michael Thies},
title = {Application-driven Development of Concurrent Packet Processing Platforms},
booktitle = {PARELEC 2006, International Conference on Parallel Computing in Electrical Engineering, Bialystok, Poland},
year = {2006}
}
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Full Text]
Peter Bleckmann, Gunnar Schomaker, Adrian Slowik:
Virtualization with Prefetching Abilities based on iSCSI. In
Proceedings of the International Workshop on Storage Network Architecture and Parallel I/Os (SNAPI 2004) (Nice, France). 2004
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@inproceedings{Snapi2004Paper,
author = {Peter Bleckmann AND Gunnar Schomaker AND Adrian Slowik},
title = {Virtualization with Prefetching Abilities based on iSCSI},
booktitle = {Proceedings of the International Workshop on Storage Network Architecture and Parallel I/Os (SNAPI 2004)},
year = {2004}
}
Gunnar Hagen, Jörg-Christian Niemann, Mario Porrmann, Christian Sauer, Adrian Slowik, Michael Thies:
Developing an IP-DSLAM Benchmark for Network Processor Units. In
ANCHOR 2004, Advanced Networking and Communications Hardware Workshop, held in conjunction with the 31st Annual International Symposium on Computer Architecture (ISCA 2004), Munich - Germany. 19~-~23~ # jun 2004
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@inproceedings{HNPS2004,
author = {Gunnar Hagen AND J{\"o}rg-Christian Niemann AND Mario Porrmann AND Christian Sauer AND Adrian Slowik AND Michael Thies},
title = {Developing an IP-DSLAM Benchmark for Network Processor Units},
booktitle = {ANCHOR 2004, Advanced Networking and Communications Hardware Workshop, held in conjunction with the 31st Annual International Symposium on Computer Architecture (ISCA 2004), Munich - Germany},
year = {2004}
}
Matthias Grünewald, Uwe Kastens, Dinh Khoi Le, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Michael Thies, Adrian Slowik:
Network Application Driven Instruction Set Extensions for Embedded Processing Clusters. In
PARELEC 2004, International Conference on Parallel Computing in Electrical Engineering, Dresden, Germany. 2004
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@inproceedings{GKLN2004,
author = {Matthias Gr{\"u}newald AND Uwe Kastens AND Dinh Khoi Le AND J{\"o}rg-Christian Niemann AND Mario Porrmann AND Ulrich R{\"u}ckert AND Michael Thies AND Adrian Slowik},
title = {Network Application Driven Instruction Set Extensions for Embedded Processing Clusters},
booktitle = {PARELEC 2004, International Conference on Parallel Computing in Electrical Engineering, Dresden, Germany},
year = {2004}
}
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael Thies:
Feedback Driven Instruction-Set Extension. In
Proceedings of ACM SIGPLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04) (Washington, D.C., USA). 2004
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@inproceedings{GigaNetICLCTES04,
author = {Uwe Kastens AND Dinh Khoi Le AND Adrian Slowik AND Michael Thies},
title = {Feedback Driven Instruction-Set Extension},
booktitle = {Proceedings of ACM SIGPLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04)},
year = {2004}
}
D. Fischer, J. Teich, R. Weper, Michael Thies:
BUILDABONG: A Framework for Architecture/Compiler Co-Exploration for ASIPs. In
Journal of Circuits, Systems, and Computers, vol. 12, no. 3, pp. 353-375. 2003
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Show BibTeX]
@article{TeichThies2003,
author = {D. Fischer AND J. Teich AND R. Weper AND Michael Thies},
title = {{BUILDABONG:} A Framework for Architecture/Compiler Co-Exploration for {ASIP}s},
journal = {Journal of Circuits, Systems, and Computers},
year = {2003},
volume = {12},
number = {3},
pages = {353--375},
month = {},
note = {}
}
O. Bornorden, N. Brühls, Uwe Kastens, Dinh Khoi Le, Friedhelm Meyer auf der Heide, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies:
A holistic methodology for network processor design. In
Proceedings of Workshop on High-Speed Local Networks (HSLN) at Local Computer Networks (LCN2003) (Bonn, Germany). 2003
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@inproceedings{GigaNetIC03,
author = {O. Bornorden AND N. Br{\"u}hls AND Uwe Kastens AND Dinh Khoi Le AND Friedhelm Meyer auf der Heide AND Mario Porrmann AND Ulrich R{\"u}ckert AND Adrian Slowik AND Michael Thies},
title = {A holistic methodology for network processor design},
booktitle = {Proceedings of Workshop on High-Speed Local Networks (HSLN) at Local Computer Networks (LCN2003)},
year = {2003}
}
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Full Text]
D. Fischer, J. Teich, Michael Thies, R. Weper:
Efficient Architecture/Compiler Co-Exploration for ASIPs. In
Proceedings of ACM SIG International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2002) (Grenoble, France 2002). 2002
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@inproceedings{TeichThies02,
author = {D. Fischer AND J. Teich AND Michael Thies AND R. Weper},
title = {Efficient Architecture/Compiler Co-Exploration for ASIPs},
booktitle = {Proceedings of ACM SIG International Conference on Compilers},
year = {2002}
}
D. Fischer, Uwe Kastens, J. Teich, Michael Thies, R. Weper:
Design Space Characterization for Architecture/Compiler Co-Exploration. In
Proceedings of ACM SIG International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2001) (Georgia, Atlanta, USA), pp. 108-115. 2001
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@inproceedings{TeichThies01,
author = {D. Fischer AND Uwe Kastens AND J. Teich AND Michael Thies AND R. Weper},
title = {Design Space Characterization for Architecture/Compiler Co-Exploration},
booktitle = {Proceedings of ACM SIG International Conference on Compilers},
year = {2001}
}
Peter Pfahler, C. Nagel, Franz-Josef Rammig, Uwe Kastens:
Design of a VLIW Architecture Constructed from Standard RISC Chips: A Case Study of Hardware/Software Software Codesign. In
Proceedings of Euromicro 1993, Microprocessing and Microprogramming (Amsterdam). Nordholland, 1993
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@inproceedings{Pfahler93vliw,
author = {Peter Pfahler AND C. Nagel AND Franz-Josef Rammig AND Uwe Kastens},
title = {Design of a {VLIW} Architecture Constructed from Standard {RISC} Chips: A Case Study of Hardware/Software Software Codesign},
booktitle = {Proceedings of Euromicro 1993, Microprocessing and Microprogramming},
year = {1993}
}
Christian Ewering:
A New Allocation Method for the Synthesis of Partitioned Busses. In
GME/GI/ITG-Fachtagung. 1990
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Show BibTeX]
@article{Ewering90c,
author = {Christian Ewering},
title = {A New Allocation Method for the Synthesis of Partitioned Busses},
journal = {GME/GI/ITG-Fachtagung},
year = {1990},
volume = {},
number = {},
pages = {},
month = {},
note = {}
}
Christian Ewering, Gunter Gerhardt:
PASS: High Level Synthesis. In
Proceedings of Euromicro 1990, Microprocessing and Microprogramming. 1990
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@inproceedings{Ewering90b,
author = {Christian Ewering AND Gunter Gerhardt},
title = {{PASS}: High Level Synthesis},
booktitle = {Proceedings of Euromicro 1990, Microprocessing and Microprogramming},
year = {1990}
}
Christian Ewering:
Automatic High-Level Synthesis of Partitioned Busses. In
IEEE Int. Conf. on Computer Aided Design, pp. 304-307. 1990
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Show BibTeX]
@article{Ewering90a,
author = {Christian Ewering},
title = {Automatic High-Level Synthesis of Partitioned Busses},
journal = {IEEE Int. Conf. on Computer Aided Design},
year = {1990},
volume = {},
number = {},
pages = {304--307},
month = {},
note = {}
}
Christian Ewering:
Automatic high level synthesis of partitioned busses. Tech. Rep., no. tr-ri-90-66. 1990
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Show BibTeX]
@techreport{Ewering90,
author = {Christian Ewering},
title = {Automatic high level synthesis of partitioned busses},
institution = {},
year = {1990}
}
Gerhard Goos, Uwe Kastens:
Programming Languages and the Design of Modular Programs. In Peter Hibbard and Stephen Schuman (eds.):
Constructing Quality Software (Amsterdam), pp. 153-186. North-Holland, 1977
[
Show BibTeX]
@incollection{Goos77,
author = {Gerhard Goos AND Uwe Kastens},
title = {Programming Languages and the Design of Modular Programs},
booktitle = {Constructing Quality Software},
publisher = {North-Holland},
year = {1977}
}